I2C

Overview

Inter-Integrated Circuit (I2C) is a synchronous, half-duplex, multi-master serial communication protocol widely used to connect low to medium-speed peripherals to various digital logic devices. It is valued for its simplicity, scalability, and minimal pin usage, allowing multiple devices to share the same two-wire bus.

Core Characteristics

  • Synchronous - Data is transferred in sync with a clock signal (SCL) generated by the bus master.

  • Half-duplex - Data flows in one direction at a time over a shared data line.

  • Multi-master, multi-slave - Supports multiple masters and multiple slaves on the same bus.

  • Address-based - Each device has a unique 7-bit or 10-bit address for identification.

  • Open-drain / open-collector - Lines are actively pulled low but require pull-up resistors to return high.

Physical Interface

I2C uses two bidirectional lines:

Signal Direction (Master POV) Function

SCL (Serial Clock)

Output (from master)

Clock signal that synchronizes data transfers.

SDA (Serial Data)

Bidirectional

Carries addresses, data, and control bits.

How it works:

  1. Pull-up resistors keep both lines high when idle.

  2. A master initiates communication by sending SDA low while SCL is high.

  3. Data is sent in 8-bit bytes, with the most significant bit first.

  4. Each byte is followed by an acknowledgment (ACK/NACK) from the receiving device.

  5. A stop condition, the SDA going high while SCL is high, ends the communication.

Communication Process

  1. Initialization - Master configures bus speed (Standard: 100 kHz, Fast: 400 kHz, Fast Plus: 1 MHz, High-Speed: 3.4 MHz).

  2. Start Condition - Master pulls SDA low while SCL is high to signal the beginning of communication.

  3. Address + R/W Bit - Master sends a 7- or 10-bit address and a read/write control bit.

  4. Acknowledge - Receiver pulls SDA low during the ACK clock pulse to confirm receipt.

  5. Data Transfer - Bytes are transferred one at a time, each followed by an ACK/NACK.

  6. Stop Condition - SDA returns high while SCL is high, releasing the bus.

Performance and Limitations

  • Speed - Supports several standardized modes up to 3.4 MHz

  • Distance - Limited by bus capacitance, practical lengths are typically under 1 m at high speed.

  • Pull-up Dependency - Resistor sizing affects rise times, speed, and power consumption.

  • Arbitration - When multiple masters attempt to control the bus, hardware arbitration ensures only one master continues.

  • Clock Stretching - Slaves can hold SCL low to delay communication if more processing time is needed.

Common Applications

I2C is used in a wide range of devices, such as:

  • Sensors - Temperature, pressure, accelerometers

  • Real-Time Clocks (RTC)

  • EEPROM and other small memory devices

  • ADCs and DACs

  • Power management ICs

Resources

TI I2C Explanation

Video Explanation