Serial Peripheral Interface (SPI)
Overview
The Serial Peripheral Interface (SPI) is a synchronous, full-duplex serial communication protocol commonly used in embedded systems to connect a master device (often a microcontroller) with one or more slave devices (peripherals). It is widely valued for its speed, simplicity, and flexibility, enabling high-throughput data transfers with relatively low overhead.
Core Characteristics
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Synchronous - Data is transmitted in sync with a clock signal (SCLK) generated by the master.
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Full-duplex - Data flows in both directions simultaneously.
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Master-driven - The master controls the clock, initiates communication, and selects the slave device(s).
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Point-to-point or multi-slave - Works with a single slave or multiple slaves, each with a dedicated chip select line.
Physical Interface
The most common configuration uses four signals:
| Signal | Direction (Master POV) | Function |
|---|---|---|
SCLK (Serial Clock) |
Output |
Clock signal that synchronizes data exchange. |
CS / SS (Chip Select / Slave Select) |
Output |
Active-low line used to select a specific slave. |
MOSI (Master Out, Slave In) |
Output |
Data from master to slave. |
MISO (Master In, Slave Out) |
Input |
Data from slave to master. |
How it works:
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The master pulls CS low to select the target slave.
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On each clock pulse, a bit is shifted out from MOSI and simultaneously a bit is shifted in from MISO.
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When done, the master sets CS high to end the transaction.
Communication Process
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Initialization - Master configures clock speed, CPOL, CPHA, and selects the desired slave.
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Selection - CS line goes low to activate the slave.
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Data Transfer -
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Master shifts out data on MOSI.
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Slave shifts out data on MISO.
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Both sides sample incoming data on the configured clock edge.
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Completion - CS line returns high, ending communication.
Performance and Limitations
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Speed - Can reach tens of MHz, much faster than I²C in most cases.
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Distance - Best for short PCB or cable runs (typically under ~1 m).
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No Addressing - Requires a separate CS line for each slave, limiting scalability.
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No Acknowledgment - Unlike I²C, there’s no ACK/NACK; error detection must be implemented at a higher layer if needed.